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raphael

6 Posts

Posted - 02 Jun 2009 :  03:29:50  Show Profile
Hello,

we need to port the NetBSD operating system to the Sphere II platform.

For this we need the complete physical memory map of the Sphere II.

Thanks in advance,
Raphael Langerhorst

grenierm

133 Posts

Posted - 02 Jun 2009 :  09:38:23  Show Profile  Email Poster
Hi Raphael,

Thanks for your question.

The memory map for our PXA255 and PXA270 products can be found at Eurotech Forum Topic 2464

To convert these addresses to the EP9315 (Sphere II) addresses, simply change the MSB from 0 to 6 in all the memory address values. The offsets are the same for both the EP9315 and PXA255/270 memory maps.

However, we should note that we support Linux and Windows CE 5.0 on the Sphere II currently. As a result, we can't necessarily support Sphere II development with NetBSD OS. Drop us a line (support.us@eurotech.com) with your NetBSD requirements and we will work with you to meet these design goals.
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raphael

6 Posts

Posted - 02 Jun 2009 :  10:03:38  Show Profile
Hi,

Yes, I know about the memory map for flash memory. But for doing the porting we need the entire memory map (including RAM locations, etc., specifically, which chip selects are used). Is this information available?

We do not need the hardware registers located at 0x8... as these are already listed in the EP9315 user manual.

Thanks,
Raphael
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grenierm

133 Posts

Posted - 02 Jun 2009 :  10:58:14  Show Profile  Email Poster
Take a look at the kernel source code for Sphere II on our Linux Forums.

Specifically, take a look at arch/arm/mach-ep93xx/adssphere.c
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raphael

6 Posts

Posted - 05 Jun 2009 :  04:44:49  Show Profile
Thanks for pointing to the Linux sources, there is a lot of interesting information there, although it is still difficult to construct a complete memory map just from the sources.

One further question is: Is the ASD0 pin of the EP9315 processor set to 0 or 1?

Also: which chip select(s) is/are used for RAM (SDCS0?). Probably only one chip select (SDCS0) is used and two 16-bit RAM blocks are connected to the device?

Thanks,
Raphael
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grenierm

133 Posts

Posted - 12 Jun 2009 :  09:50:33  Show Profile  Email Poster
Raphael,

- Pin Y16/ASDO (Oh, not zero) is 1 by default by a pull-up.
- The SDRAM chip select (one of SDCSn[x]) is determined by which of these resistors is installed:

- R60 for nCS0
- R65 for nCS1
- R55 for nCS2
- R121 for nCS3

- R121 is installed by default, so SDCSn[3] the chip select on standard boards.

We will email you a graphic with the location of each of these resistors on the Sphere II for you to verify which stuffing option is in place.
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raphael

6 Posts

Posted - 12 Jun 2009 :  10:54:04  Show Profile
Hi,

thanks for the details.

This helps to understand the memory configuration.

What does the configuration look like for the 128MB version of the SphereII?
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adrian

17 Posts

Posted - 12 Jun 2009 :  10:58:19  Show Profile  Email Poster
The chip select situation with flash is similar to the SDRAM.

The flash chip select comes from one of the CPU pins nCS0, nCS1, nCS2, nCS3, nCS6 or nCS7. One of these is connected to the chip select on the flash by a resistor. The default chip select is nCS6 (pin F4 on the EP9315).

Here are the resistors that select the chip select. Only one will be installed:

- R117 for nCS0
- R77 for nCS1
- R78 for nCS2
- R119 for nCS3
- R93 for nCS6
- R79 for nCS7

- R93 is installed by default.
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raphael

6 Posts

Posted - 12 Jun 2009 :  11:38:25  Show Profile
With regards to the physical memory map, I have asked Alessandro Pasqualini (after receiving his reply today) for a memory map (again), explaining that this is a fundamental piece of information for computer hardware (like the SphereII).

Since we already managed to port the bootstrapping code of the NetBSD Kernel we already have some details of the memory map. I would like to start with what we know here and maybe the gaps can be filled later on. This is standard 64 MB RAM version:

ASDO pin is 1.
EP9315 memory map in EP9315 user manual, chapter 2.3.5:


0x0000 0000 - 0x01FF FFFF SDRAM (CS3)
0x0200 0000 - 0x03FF FFFF NOTHING
0x0400 0000 - 0x05FF FFFF SDRAM (CS3)
0x0600 0000 - 0x09FF FFFF NOTHING

0x1000 0000 - 0x3FFF FFFF NOTHING (???)
0x4000 0000 - 0x5FFF FFFF PCMCIA (???)

0x6000 0000 - 0x6100 0000 Flash (???)
0x6100 0000 - 0x6FFF FFFF NOTHING
0x7100 0000 - 0x7FFF FFFF NOTHING (???)
0x8000 0000 - 0x8FFF FFFF System Registers

0x9000 0000 - 0xBFFF FFFF N/A

0xC000 0000 - 0xFFFF FFFF NOTHING (???)


Everything marked with ??? is not yet confirmed. These gaps should be filled.
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jlackey

213 Posts

Posted - 12 Jun 2009 :  14:13:19  Show Profile  Email Poster
Hi Raphael,

I see a couple of problems.

The upper limit on the 4th line should be 0x07f00000. The 2nd and 4th lines will be SDRAM instead of NOTHING on a system with 128MB SDRAM.

The upper limit for flash memory on the 7th line should be higher. You're showing 16MB in your map but 32MB or even 64MB of flash is more typical.

In addition to the kernel source code mentioned above, you should also check out the bootloader source code, especially include/configs/adssphere.h since it contains most of the information you'll need.

If your system is currently running linux, you can
    cat /proc/iomem
to see how things are laid out there.

Finally, from a u-boot prompt, you can use the
    md <addr> [<len>]
command to see how we have various registers configured under u-boot.
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raphael

6 Posts

Posted - 17 Jun 2009 :  10:34:02  Show Profile
I have received pictures showing the chip select configuration resistor locations for SDRAM. Thank you.

Now I would also like to ask if uboot will be able to handle different settings of the SDRAM chip select? Will uboot be able to load and run itself and show the prompt on the console?
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akidder

1519 Posts

Posted - 17 Jun 2009 :  10:36:35  Show Profile  Email Poster
Hi Raphael. Contact me directly with your questions (you can click my profile link to the left of this post). Porting OSes is not part of our standard business model, but we will do our best to accomodate your requests.
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