; 16bpp LQ64343 panel 0x14000001 0x00 ; Miscellaneous Register (Allow access to registers) 0x140001FC 0x00 ; Display Mode Register (Initial value - no displays) 0x14000010 0x01 ; Memory Clock Configuration Register (CLKI 50MHhz) 0x14000014 0x10 ; LCD Pixel Clock Configuration Register (CLKI/2 25MHz) 0x14000018 0x00 ; CRT/TV Pixel Clock Configuration Register (CLKI 50MHz) 0x1400001C 0x02 ; MediaPlug Clock Configuration Register (CLKI2 pixclock on SA1100) 0x1400001E 0x00 ; CPU To Memory Wait State Select Register (no restrictions) 0x14000021 0x02 ; DRAM Refresh Rate Register (setting for 32 to 50MHz) 0x1400002A 0x00 ; DRAM Timings Control Register 0 (setting for 42 to 50Mhz) 0x1400002B 0x01 ; DRAM Timings Control Register 1 (setting for 42 to 50Mhz) 0x14000020 0x80 ; Memory Configuration Register (initialized SDRAM) 0x14000030 0x2D ; Panel Type Register (TFT, 18bit) 0x14000031 0x00 ; MOD Rate Register (D/C Passive only) 0x14000032 0x4F ; LCD Horizontal Display Width Register ( ((0x4F + 1) * 8) = 640 pixels wide) 0x14000034 0x0D ; LCD Horizontal Non-Display Period Register ( ((0x0D + 1) * 8) = 112 pixels) 0x14000035 0x06 ; TFT FPLINE Start Position Register ( ((6 + 5) * 8) = 88 pixels) 0x14000036 0x01 ; TFT FPLINE Pulse Width Register ( ((1 + 1) * 8) = 16 pixels) 0x14000038 0xDF ; LCD Vertical Display Height Register 0 ( (0x01DF + 1) = 480 lines) 0x14000039 0x01 ; LCD Vertical Display Height Register 1 ( (0x01DF + 1) = 480 lines) 0x1400003A 0x37 ; LCD Vertical Non-Display Period Register ( (0x37 + 1) = 56 lines) 0x1400003B 0x15 ; TFT FPFRAME Start Position Register ( (0x15 + 1) = 22 lines) 0x1400003C 0x02 ; TFT FPFRAME Pulse Width Register ( (2 + 1) = 3 lines) 0x14000040 0x05 ; LCD Display Mode Register ( 16 bpp ) 0x14000041 0x01 ; LCD Miscellaneous Register (dithering enabled, dual panel disabled) 0x14000042 0x00 ; LCD Display Start Address Register 0 0x14000043 0x00 ; LCD Display Start Address Register 1 0x14000044 0x00 ; LCD Display Start Address Register 2 0x14000046 0x80 ; LCD Memory Address Offset Register 0 (0x0280 = 640) 0x14000047 0x02 ; LCD Memory Address Offset Register 1 (0x0280 = 640) 0x14000048 0x00 ; LCD Pixel Panning Register 0x1400004a 0x00 ; LCD Display FIFO High Threshold Control Register 0x1400004B 0x00 ; LCD Display FIFO Low Threshold Control Register 0x14000050 0x4F ; CRT/TV Horizontal Display Width Register 0x14000052 0x13 ; CRT/TV Horizontal Non-Display Period Register 0x14000053 0x01 ; CRT/TV HRTC Start Position Register 0x14000054 0x0B ; CRT/TV HRTC Pulse Width Register 0x14000056 0xDF ; CRT/TV Vertical Display Height Register 0 (0x01df + 1 = 480) 0x14000057 0x01 ; CRT/TV Vertical Display Height Register 1 (0x01df + 1 = 480) 0x14000058 0x2B ; CRT/TV Vertical Non-Display Period Register 0x14000059 0x09 ; CRT/TV VRTC Start Position Register 0x1400005A 0x01 ; CRT/TV VRTC Pulse Width Register 0x1400005B 0x10 ; TV Output Control Register 0x14000060 0x85 ; CRT/TV Display Mode Register 0x14000062 0x00 ; CRT/TV Display Start Address Register 0 0x14000063 0x00 ; CRT/TV Display Start Address Register 1 0x14000064 0x00 ; CRT/TV Display Start Address Register 2 0x14000066 0x80 ; CRT/TV Memory Address Offset Register 0 0x14000067 0x02 ; CRT/TV Memory Address Offset Register 1 0x14000068 0x00 ; CRT/TV Pixel Panning Register 0x1400006A 0x00 ; CRT/TV Display FIFO High Threshold Control Register 0x1400006B 0x00 ; CRT/TV Display FIFO Low Threshold Control Register 0x14000070 0x00 ; LCD Ink/Cursor Control Register 0x14000071 0x01 ; LCD Ink/Cursor Start Address Register 0x14000072 0x00 ; LCD Cursor X Position Register 0 0x14000073 0x00 ; LCD Cursor X Position Register 1 0x14000074 0x00 ; LCD Cursor Y Position Register 0 0x14000075 0x00 ; LCD Cursor Y Position Register 1 0x14000076 0x00 ; LCD Ink/Cursor Blue Color 0 Register 0x14000077 0x00 ; LCD Ink/Cursor Green Color 0 Register 0x14000078 0x00 ; LCD Ink/Cursor Red Color 0 Register 0x1400007A 0x1F ; LCD Ink/Cursor Blue Color 1 Register 0x1400007B 0x3F ; LCD Ink/Cursor Green Color 1 Register 0x1400007C 0x1F ; LCD Ink/Cursor Red Color 1 Register 0x1400007E 0x00 ; LCD Ink/Cursor FIFO Threshold Register 0x14000080 0x00 ; CRT/TV Ink/Cursor Control Register 0x14000081 0x01 ; CRT/TV Ink/Cursor Start Address Register 0x14000082 0x00 ; CRT/TV Cursor X Position Register 0 0x14000083 0x00 ; CRT/TV Cursor X Position Register 1 0x14000084 0x00 ; CRT/TV Cursor Y Position Register 0 0x14000085 0x00 ; CRT/TV Cursor Y Position Register 1 0x14000086 0x00 ; CRT/TV Ink/Cursor Blue Color 0 Register 0x14000087 0x00 ; CRT/TV Ink/Cursor Green Color 0 Register 0x14000088 0x00 ; CRT/TV Ink/Cursor Red Color 0 Register 0x1400008A 0x1F ; CRT/TV Ink/Cursor Blue Color 1 Register 0x1400008B 0x3F ; CRT/TV Ink/Cursor Green Color 1 Register 0x1400008C 0x1F ; CRT/TV Ink/Cursor Red Color 1 Register 0x1400008E 0x00 ; CRT/TV Ink/Cursor FIFO Threshold Register 0x14000100 0x00 ; BitBlt Control Register 0 0x14000101 0x00 ; BitBlt Control Register 1 0x14000102 0x00 ; BitBlt ROP Code/Color Expansion Register 0x14000103 0x00 ; BitBlt Operation Register 0x14000104 0x00 ; BitBlt Source Start Address Register 0 0x14000105 0x00 ; BitBlt Source Start Address Register 1 0x14000106 0x00 ; BitBlt Source Start Address Register 2 0x14000108 0x00 ; BitBlt Destination Start Address Register 0 0x14000109 0x00 ; BitBlt Destination Start Address Register 1 0x1400010A 0x00 ; BitBlt Destination Start Address Register 2 0x1400010C 0x00 ; BitBlt Memory Address Offset Register 0 0x1400010D 0x00 ; BitBlt Memory Address Offset Register 1 0x14000110 0x00 ; BitBlt Width Register 0 0x14000111 0x00 ; BitBlt Width Register 1 0x14000112 0x00 ; BitBlt Height Register 0 0x14000113 0x00 ; BitBlt Height Register 1 0x14000114 0x00 ; BitBlt Background Color Register 0 0x14000115 0x00 ; BitBlt Background Color Register 1 0x14000118 0x00 ; BitBlt Foreground Color Register 0 0x14000119 0x00 ; BitBlt Foreground Color Register 1 0x140001E0 0x00 ; Look-Up Table Mode Register 0x140001E2 0x00 ; Look-Up Table Address Register 0x140001F0 0x10 ; Power Save Configuration Register 0x140001F1 0x00 ; Power Save Status Register 0x140001F4 0x00 ; CPU-to-Memory Access Watchdog Timer Register 0x140001FC 0x01 ; Display Mode Register