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Moose2

1 Posts

Posted - 30 Jun 2008 :  10:08:35  Show Profile  Email Poster
I am using the NSSP port on the BistsyX for SPI communications. In general it is working fine.

However, I am having intermittent failures when reading a 128byte block from a memory chip. What I've discovered is that intermittently (approx 1 out of every 10 attempts) the communications stops mid stream, causing the SFRM to cycle. Cycling SFRM, which is connected to chip select, causes the memory chip to reset and wait for the next command instead of continuing to send the data.

1st, I'm not sure what is causing the pause. It is 10mS to 20mS long, and it is not in the code. The code simply loops, I am wondering if the OS is preempting the process.

2nd, The pause would not be a problem if SFRM did not cycle. If SFRM did not cycle then the communication would simply continue on when it restarts.

Suggestions on either solution would be helpful.

Regards,
Greg


akidder

1519 Posts

Posted - 01 Jul 2008 :  11:32:10  Show Profile  Email Poster
Hi Greg. The signals on header J3 connect directly to the PXA255, so I don't expect any hardware issues (I'm assuming no signal integrity issues on your side of the hardware; i.e. signal paths are short and there is no series resistance). We might have to put some engineering time into this one to investigate.

If you're doing new development, it might be more cost-effective to work on the BitsyXb, which features PXA270. Drop us a line and we'll be glad to discuss how to move forward to resolve this issue.
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