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ninjo
38 Posts |
 Posted - 02 Jun 2004 : 18:05:09
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Looking through the documentation for the Bitsy X I found some confusing information:
p20 4.1.4 Interrupts:
It says there are 3 ext_irqs with pxa255 gp27, sa1111 gpb4, and pxa255 gp10 as the respective pinouts. I'd like to hook into one of these. It looks like ext_irq1 and ext_irq2 are used on the personality board for ethernet and usb respectively. Is this right?
The main problem is this:
p20 4.1.6 seems to conflict with 4.1.4; the PXA255's pin descriptions don't match. For example this section says ext_irq3 is pxa255 gp2 not gp 10.
Since the kernel source doesn't use the same naming convention I'm stuck trying to figure out what physical line goes to what GPIO on what device.
I found the schematic of the personality board, but I guess what I need is a schematic of the Bitsy X.
Any help greatly appreciated.
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tbenisa
2 Posts |
Posted - 22 Feb 2005 : 12:43:56
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| Actually I have noticed the same thing. Unfortunately, external interrupts are not discussed in any details in the BitsyX user's manual. I would like to see a section on how to use external interrupts in the use’s manual. I am surprised that ADS has not replyed to this email yet. |
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sundog
15 Posts |
Posted - 22 Feb 2005 : 15:47:57
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According to Topic 884, ext_irq3 is unavailable with Revision A BitsyX boards.
We need four interrupt pins for our application. We have re-purposed four XScale GPIOs as interrupt pins.
According to the Intel XScale documentation, any GPIO can be programmed to generate an interrupt on a rising or falling edge (they cannot generate level-based interrupts).
The XScale GPIO are mapped to ADS EIO according to the following table:
GPIO03 EIO00 J10.8
GPIO04 EIO01 J10.6
GPIO07 EIO02 J10.4
GPIO10 EIO03 J10.2
GPIO16 EIO04 J10.5
GPIO19 EIO05 J3.12
GPIO20 EIO06 J3.14
GPIO21 EIO07 J3.3
GPIO22 EIO08 J3.2
GPIO32 EIO09 J3.1
Of course, repurposing GPIOs involves some kernel hacking. Here is some sample code to start you off:
static void my_irq_handler( int irq, void* dev_id,struct pt_regs* regs) {
printk(KERN_INFO My IRQ!!\n");
}
unsigned int __initdata my_irq=0;
static int my_init(void) {
int ret;
my_irq = GPIO_2_80_TO_IRQ(3); /* GPIO 3 */
set_GPIO_IRQ_edge(3,GPIO_RISING_EDGE);
ret=request_irq(my_irq,my_irq_handler,SA_INTERRUPT,
"My Interrupt",NULL);
return ret;
}
Ref: http://www.intel.com/design/pca/applicationsprocessors/manuals/278693.htm
Ref: topic.asp?TOPIC_ID=884 |
Edited by - sundog on 22 Feb 2005 15:54:14 |
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akidder
1519 Posts |
Posted - 22 Feb 2005 : 16:25:16
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Thanks for the response, sundog. You are correct that the PXA255 gpios can each be configured as an interrupt input. Thanks for the patch details.
Since two of the three posts on this thread are clearly Linux-related, I'm going to move it to the Linux discussion forum.
tbenisa, if you are interested in CE, take a look at the new digital IO driver described at topic 1788. I think interrupt functionality might still be under test, but it's underway. |
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akidder
1519 Posts |
Posted - 23 Feb 2005 : 13:00:25
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I've moved this post back to the hardware forum, as Linux guys figured it had more to do with hardware than with Linux.
If you use CE or another operating system, please ignore the Linux info in this post  . |
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ctacke
877 Posts |
Posted - 23 Feb 2005 : 13:08:49
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| For those using CE, the DIO driver provides the ability to use all of the EIO lines as interrupts (as well as wake ups). |
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rffg
10 Posts |
Posted - 24 Feb 2005 : 10:58:26
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The PWER PXA255 register seem to only define wake-up for gpio 0-15.
If so, only eio 0-3 can be used for wake-up. Right?
/ Ralf
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jlackey
213 Posts |
Posted - 24 Feb 2005 : 13:00:17
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You are correct.
The PXA255 CPU only supports wake-up on GPIO 0-15.
Only EIO 0-3 on the BitsyX hardware fall within this range. |
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