All Forums
 Hardware
 General Hardware, ADSmartIO, Digital I/O and A/Ds
 Sphere SPI setup
 Forum Locked
 Send Topic to a Friend
 Printer Friendly
Author Topic  

bkohan

2 Posts

Posted - 01 Oct 2007 :  16:22:12  Show Profile  Email Poster
Code snippet:
SSP_CONFIG_TYPE sspConfig;
sspConfig.sspFrameSize = 8; // 8 bit frame size
sspConfig.sspClkPreDivider = 2; // SSP clock speed = 7372800 / (prediv * (1 + div))
sspConfig.sspClkDivider = 3; // = 0.9216 Mhz
sspConfig.sspClkPhase = LEADING;
sspConfig.sspClkPolarity = NEGATIVE;
sspConfig.sspFormat = SPI;
sspConfig.sspMode = MASTER;

What does "LEADING" and "NEGATIVE" mean in SPI terms? Usually Clock Phase (0/1) and CLock Polarity (0/1) are used to describe SPI.

beitman

63 Posts

Posted - 01 Oct 2007 :  17:19:40  Show Profile  Email Poster
You are correct, those names are unfortunate interpretations of the descriptions in the EP915 manual. You may also use (0/1) as these values are written to the correct bits in the SSPCR0 register.

LEADING/TRAILING would be better as FIRST_EDGE/SECOND_EDGE.

POSITIVE/NEGATIVE would be better as LOW/HIGH
Go to Top of Page

bkohan

2 Posts

Posted - 02 Oct 2007 :  07:39:12  Show Profile  Email Poster
quote:
[i]Originally posted by beitman[/i]
[br]You are correct, those names are unfortunate interpretations of the descriptions in the EP915 manual. You may also use (0/1) as these values are written to the correct bits in the SSPCR0 register.

LEADING/TRAILING would be better as FIRST_EDGE/SECOND_EDGE.

POSITIVE/NEGATIVE would be better as LOW/HIGH



So, based on the code snippet, what does the clock look like and when is the data "clocked"? In SPI lingo a clock polarity of low/negative would mean the clock is Low when not active.
Go to Top of Page

beitman

63 Posts

Posted - 02 Oct 2007 :  16:40:17  Show Profile  Email Poster
sspConfig.sspClkPolarity is used to set the SPO bit in the SSPCR0 register of the SSP controller on the EP9315. The description of that bit from the EP9315 Users Guide is:

"When the SPO clock polarity control bit is LOW, it produces a steady state low value on SCLKOUT pin. If the SPO clock polarity control bit is HIGH, a steady state high value is place on the SCLKOUT pin when data is not being transferred."

Per the EP9315 Users Guide, for Motorola SPI protocol, you would set

sspConfig.sspClkPhase = 0;
sspConfig.sspClkPolarity = 0;
Go to Top of Page
  Topic  
 Forum Locked
 Send Topic to a Friend
 Printer Friendly
Jump To:
Eurotech Support Forums © Eurotech Inc. Go To Top Of Page
This page was generated in 0.02 seconds. Snitz Forums 2000